MULTIPLEX COMMUNICATION INTERFACE BETWEEN PROCESSOR AND DIGITAL TRANSMISSION MEANS,申请号JP19830134506-传众专利搜索

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发明名称	MULTIPLEX COMMUNICATION INTERFACE BETWEEN PROCESSOR AND DIGITAL TRANSMISSION MEANS
摘要
申请公布号	JPS5935232(A)	申请公布日期	1984.02.25
申请号	JP19830134506	申请日期	1983.07.25
申请人	SHI ETSUSE E ERE CHII SENTORO SUTEYUDEI E LAB TEREKOMINIKACHIOONI SPA	发明人	KARURO DEMIKERISU;PAORO MANCHINI;PAORO MATSUTOONE
分类号	H04L29/10;G06F13/00;H04L29/06	主分类号	H04L29/10
代理机构		代理人
主权项
地址

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