| 摘要 |
A timer circuit consists of a resistance-capacitor charging network with an adjustable potentiometer providing a predeterminable comparison voltage according to the length of time desired and operational amplifier connected as a comparator between the capacitor and the potentiometer providing current gain and high input impedance to prevent loading the capacitor. The non-inverting input of the operational amplifier is coupled to the capacitor and the output of the operational amplifier is fed back to the inverting input of the operational amplifier. A field-effect transistor is provided for discharging the capacitor to zero at the end of the timing cycle in order to avoid the effect of discharge potential difference of other types of discharge devices. A supplemental circuit is provided for illuminating a pilot light precisely during the time that the charging cycle is going on.
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