| 摘要 |
PURPOSE:To ensure the fine control of a delay with absence of noise, by applying a DC voltage from the outside to the gates of MOS transistors which are set in series to a signal transmission line. CONSTITUTION:An output terminal D is set at level H when MOS transistors TR1, 4 and 5 are turned off, and TR2, 3 and 6 are turned on, respectively. The potentials of terminals C and G are set at level H when the TR1 and TR2 are turned on and off, respectively. The potential of the terminal G is set at level H in lagging from the terminal C owing to the on resistance of an MOSTR8. The potential of the terminal D is set at level L in lagging from the terminal G by the function of an MOSTR6. These lags are controlled by changing the gate applied voltage of the TR8, then the on resistance. The noise is reduced less than a case where the voltage is applied to a signal transmission line K, and it is possible to control a fine delay of the degree of several nano seconds. |
