发明名称 COMPUTER SYSTEM
摘要 PURPOSE:To perform an RAM refresh when a power supply is powered-on with a simple and miniature constitution, by refreshing the RAM via a memory control circuit after detecting the reading of a program ROM. CONSTITUTION:When an address is applied from a microprocessor 1 via a bus 2 with power-on of a power supply, a decoder 6 detects that a program ROM7 received a reading access. This detecting signal 15 is applied to the ROM7 as well as to a memory control circuit 9. An RAM8 is refreshed via the circuit 9 and synchronously with the program reading of the ROM7. Thus the refresh is possible without having any complicated procedure nor discontinuing the operation of the processor 1. This simplifies and miniaturizes the constitution of a circuit for refresh of the RAM when a power supply is powered-on.
申请公布号 JPS5933695(A) 申请公布日期 1984.02.23
申请号 JP19820141104 申请日期 1982.08.16
申请人 HITACHI SEISAKUSHO KK 发明人 HIRAHATA SHIGERU;HONDA TOYOTA;OONUKI NOBUO;TATEUCHI TSUGUJI
分类号 G11C11/406;G11C11/34;G11C11/401;(IPC1-7):11C11/34 主分类号 G11C11/406
代理机构 代理人
主权项
地址