发明名称 Semiconductor memory device having a plurality of charge-storage type memory cells.
摘要 <p>A semiconductor memory device includes charge storage type memory cells (MC1 to MCN), word lines (WL1 to WLN) and a bit line (BL) connected to the memory cells (MC1 to MCN), a sense amplifier (4) for detecting the memory data on the bit line (BL), and a voltage push-up circuit (TR1, TR2, Cl, 6) for setting up a potential on the bit line (BL). The voltage push-up circuit (TR1, TR2, C1, 6) at first sets the potential on the bit line at a power supply voltage level after the memory data having a high logic level is detected by the sense amplifier (4), and then pushes up the potential on the bit line (BL) to a higher potential level than the power supply voltage.</p>
申请公布号 EP0100908(A2) 申请公布日期 1984.02.22
申请号 EP19830106923 申请日期 1983.07.14
申请人 TOKYO SHIBAURA DENKI KABUSHIKI KAISHA 发明人 OGURA, MITSUGI
分类号 G11C11/409;G11C11/4094;(IPC1-7):11C11/24 主分类号 G11C11/409
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