| 摘要 |
An electronic timing circuit for generating linear timing periods by providing a constant current discharge path from a storage capacitor. A storage capacitor is charged through a gating transistor to a preset level. The gating transistor is then turned off, and the capacitor discharges through the serial arrangement of a field-effect transistor and a resistor. The field-effect transistor is self-biased such that the current flow from the capacitor through the transistor to the resistor is constant with respect to time. This is accomplished by varying the impedance of the transistor proportionately to the charge on the storage capacitor. The potential at the junction of the field-effect transistor and the resistor is detected by a high input impedance device which drives an output circuit.
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