发明名称 COMMUNICATION SYSTEM
摘要 PURPOSE:To attain surely excellent communication quality, by converting an input binary digital signal into separate blocks and transmitting them, and reproducing them into the original signal at the receiving side so that noise on a transmission line is spread in time and concentrated noise is brought into random noise. CONSTITUTION:A binary digiral series having a clock period T applied to a signal input terminal 8 is converted into a parallel digital series at the period NT at each block by using N-digit as one block at a series-parallel converting circuit 9 and applied to an input terminal group of a transmission signal converting circuit 11. A signal value of the input terminal group of an optional block is imaged linearly at the circuit 11. Each block of N-digit of the binary digital input series is converted into a transmission signal block of PAM pulse train in M-digit and transmitted to a transmission line 16. The receiving signal of the transmission line 16 is demodulated at a receiver 17 and the original transmission signal is reproduced. A receiving synchronizing device 18 detects a block synchronizing signal and generates various clocks required to operate a series- parallel converting circuit 19 and a parallel-series converting circuit 24. The parallel binary digital series is converted into the N-digit series having the clock period T at the circuit 24, and outputted to a signal output terminal 25.
申请公布号 JPS5928740(A) 申请公布日期 1984.02.15
申请号 JP19820139060 申请日期 1982.08.10
申请人 NIPPON DENSHIN DENWA KOSHA 发明人 OOTAKE KOUHEI;KAJIWARA SHIYOUICHI;AZEYANAGI KATSUYOSHI
分类号 H04L1/00;H03M5/14;H03M13/27;H04J99/00;H04L25/08;H04L25/49 主分类号 H04L1/00
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