CHROMINANCE SUBCARRIER GENERATING CIRCUIT

摘要

PURPOSE:To prevent the generation of jitter due to the fluctuation in a chrominance carrier signal and a color burst, by frequency-dividing an output of a stable basic clock generating circuit and multiplying the frequency-divided output so as to obtain a chrominance subcarrier. CONSTITUTION:The basic clock signal being 16/5fsc (where; fsc is a chrominance subcarrier) generated at the basic clock generating circuit 12 is frequency-divided respectively at 1/2 frequency-dividing circuits 13, 16-18 and 4/5fsc and 1/5fsc are obtained respectively at an output of the circuits 16 and 18. Two basic waves of the fsc and 3/5fsc are obtained at the output of a multiplier 31 by multiplying the output of the circuits 16 and 18 at the multiplier 31. The output of the circuit 31 is applied to a BPF or an HPF 32 to extract the fsc signal only, which is applied to an NTSC encoder 15. Thus, the generation of jitter is decreased to the utmost, then a reproduced image with improved quality is obtained.