| 摘要 |
PURPOSE:To improve the efficiency of boosting, by installing an element which is controlled by a signal of a phase reverse to a delay pulse around an electrode at the delay pulse side and enlarging the pulse amplitude of another electrode of boosting capacity. CONSTITUTION:When the output pulse phiX of a pulse generating circuit phiX-G rises to a high level VCC, charging up is performed on a bootstrap capacity CB and a parasitic capacity Clb. Therefore, the node N of the electrode at the diffused layer side of the bootstrap capacity CB, which is the connecting point of both, is brought up to an intermediate voltage V1 in accordance with the capacity ratio of both capacities CB and Cb. When the delay signal phix' of a delay circuit D becomes a high level VCC, a voltage held by the bootstrap capacity CB is added to this voltage VCC and the selection level of a word line of a dynamic type RAM is formed at a high voltage. Therefore, delivery and reception of a writing/reading-out level against a memory cell can be performed without any level loss caused by the threshold voltage of the switching MOS FET of the memory cell. |
