发明名称 INSULATED GATE FIELD EFFECT SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF
摘要 PURPOSE:To perform without deterioration of other properties in improvement in the flatness in the Vth-channel length properties and punch-through withstand voltage by providing a layer having higher density layer in the same conductive type as the channel at the gate side end of a source. CONSTITUTION:P<-> type well 2 and N type well 3 which are isolated by a field oxidized film 4 are formed on an N<-> type Si substrate 1. A channel stopper 11 and N-channel MISFET are formed in the well 2, and a P-channel MISFET is formed in the well 3. In this case, a polysilicon gate electrode is formed by the Si3N4 mask of the prescribed pattern, and impurity layers are formed at both sides of the gate electrode by self-aligning. An oxidized film of the prescribed thickness is formed on the gate electrode side by the same anti- oxidation mask, with the film as a mask, source and drain are formed at both sides of the gate electrode. According to this structure, P type layers 9, 10 are formed at the gate electrode side of N<+> type source and drain 5, 6, N<+> type layers 2, 24 are obtained adjacent to the source and drain 20, 21, thereby preventing the deterioration in the properties due to short channel effect and obtaining the prescribed properties.
申请公布号 JPS5923562(A) 申请公布日期 1984.02.07
申请号 JP19820131947 申请日期 1982.07.30
申请人 HITACHI SEISAKUSHO KK 发明人 IKEDA SHIYUUJI
分类号 H01L21/8234;H01L27/088;H01L29/78 主分类号 H01L21/8234
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