| 摘要 |
PURPOSE:To simplify the program of a CPU and to perform high-speed data transmission control, by bringing a direct memory and a direct access controller DLC under the direct control of a DMA controller and reporting the completion of transmit data to the direct DCL. CONSTITUTION:The direct memory access (DMA) controller 2 applies direct control signals to the memory 3 and direct access controller DCL 4 to write the transmit data from the memory 3 to the DLC 4. Further, a terminal TC of the controller 2 is connected to one terminal of an OR gate 10 and a bus request is applied to the other terminal of the gate 10 through an AND gate 12 to apply the output of the gate 10 to the bus request terminal of the DLC 4. Then, the controller 2 reports the completion of the transmit data to the direct DLC 4 to speed up transmission control over the data through the simple constitution without complicating the program of the CPU 1. |
