| 摘要 |
PURPOSE:To attain a stable phase locking by pull-in operation, by utilizing an alarm signal where a receiving signal goes to ''0'' by the pull-in phase locking of normalizing or high-order group side and a reset of a frequency-division circuit of an input clock, and making the phase difference at a phase comparison start pi/2. CONSTITUTION:When the alarm signal AIS is at ''1'' (out of phase of high-order group side or intermission of signal), an output signal of the AND condition of a frequency-division output of the prescribed frequency-division stage of frequency division circuits 16, 17 is inputted from an AND circuit 19 to a differentiating circuit 18, and its differentiated output is inputted to an AND circuit 20. Then, frequency division circuits 11, 12 are reset periodically in synchronizing operation of the frequency division circuits 16, 17. When a high-order group signal is restored to the normal state and the alarm signal AIS goes to ''0'', the AND circuit 20 is closed and the resetting of the frequency division circuits 11, 12 is not performed. That is, the phase difference of each frequency division output signal inputted to a phase comparator 13 is nearly pi/2. |
