发明名称 MEMORY CONTROLLER OF ELECTRONIC COMPUTER
摘要 PURPOSE:To eliminate an error of a program and to operate an electronic computer efficiently by performing exclusive control automatically when plural programs access a common global area. CONSTITUTION:A locking circuit 2 is connected to respective arithmetic controllers. When data in the global area 6 is made access, the address in an instruction is led out of an address extracting circuit 10 and inputted to a lock checking circuit 11. The circuit 11 inhibits a gate circuit 14 from being open until access to an address is completed when the address to be made access is in the global area 6 and by another controller 1. Further, when access to the global area 6 is possible and the address to be made access is not in the global area 6, a gate-on signal is outputted to the circuit 14. Therefore, only one arithmetic device 1 is permitted to be in access to the global area.
申请公布号 JPS5922154(A) 申请公布日期 1984.02.04
申请号 JP19820132403 申请日期 1982.07.29
申请人 TOKYO SHIBAURA DENKI KK 发明人 ASANUMA AKIO;OOHASHI TADAHIRO
分类号 G06F12/00;G06F9/46;G06F9/52 主分类号 G06F12/00
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