| 摘要 |
PURPOSE:To attain the stable operation, by performing sufficiently the charging of a boot capacitor, and boosting always an output of a bootstrap circuit to a power supply voltage level to any input condition. CONSTITUTION:A node 13 of the boot capacitor C'B, a 2-input NOR circuit comprising FETs Q21, Q22, Q23 using an input terminal A' as an input, and the 1st inverter comprising FETs Q24, Q25 connected to a node 12 of the capacitor C'B, are provided. An output of the 2-input NAND circuit comprising FETs Q26, Q27, Q28 is inputted to the 2nd inverter circuit comprising FETs Q29, Q30. The gate of the 1st FETQ32 for output is connected to the NOR circuit output. The gate of the 2nd FETQ31 is connected to one end of the capacitor C'B. The gate and source of a level compensating FETQ33 are connected to an output terminal B' and the drain is connected to a power supply VDD. |
