发明名称 MULTIPROCESSOR SYSTEM SHARING MEMORY
摘要 PURPOSE:To attain direct access since no transfer of data is required between a main memory and a CPU memory and therefore to shorten the data transfer time in a multiprocessor system sharing a memory, by using a mapping register to perform the transfer of data between both CPU. CONSTITUTION:The address of a main memory of a processor system 7 is produced by a mapping register 74 and sent to an address bus 3. The data on said address is transferred to a data bus 4 via a signal transmission/reception unit 75. When data are transferred to a CPU 70 from a main CPU 1, the CPU 1 prepares the corresponding data on a main memory 5 and informs the relevant address to the CPU 70 at the transfer destination. Thus the CPU 70 sets a part of the address informed to the register 74 and then reads the buffer area on a memory 73. Thus a bus control circuit 6 acquires the bus of a main processor. Then it is possible for the main memory contents decided by the CPU 70 to give direct access to the value of the register 74.
申请公布号 JPS62168257(A) 申请公布日期 1987.07.24
申请号 JP19860010576 申请日期 1986.01.20
申请人 FUJITSU LTD 发明人 ITO TSUTOMU
分类号 G06F15/16;G06F12/00;G06F12/02;G06F15/167;G06F15/177 主分类号 G06F15/16
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