发明名称 MICROCOMPUTER SYSTEM
摘要 PURPOSE:To prevent incorrect interruption, by setting the 2nd latch after setting and receiving the 1st latch at the request of non-mask processing, resetting the 2nd latch after the end of the non-mask interruption processing and detecting the output of the 1st latch at the state. CONSTITUTION:When a data is set initially to a stack pointer after initializing, a stack load signal LDS of ''1'' level is inputted to an NOR gate 16. Then, a latch 14 is reset, an output Q2 is inverted from ''1'' to ''0'', and an AND gate 13 is opened. A non-mask interruption request signal NMI' of ''0'' is inputted to an external terminal 11 in this state, then the latch 12 is set and its output signal Q1' goes to ''0'', then an output signal NMIX of a gate 13 being so far ''0'' is inverted to ''1''. Thus, an interruption detecting circuit 17 detects the level change of the signal NMIX to ''1'', allowing to detect the interruption processing request.
申请公布号 JPS5920053(A) 申请公布日期 1984.02.01
申请号 JP19820129800 申请日期 1982.07.26
申请人 TOKYO SHIBAURA DENKI KK 发明人 TOYODA SHINJIROU
分类号 G06F9/48;G06F9/46;(IPC1-7):06F9/46 主分类号 G06F9/48
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