发明名称 |
ADDER FOR EXPONENT ARITHMETIC |
摘要 |
<p>ADDER FOR EXPONENT ARITHMETIC A characteristic adder for use in a data processing system that performs floating-point arithmetic operations is described. A 1's complement subtractive adder is shown for forming the sum or difference of a pair of exponents under control of function control circuitry, along with an indication of which characteristic is larger for selecting which mantissa operand should be shifted for proper alignment. The function control circuitry responds to function signals to select addition or subtraction, provide the magnitude or complement of the results, and select between two available floating-point formats. Characteristic Overflow and Underflow is tested and signaled for each of the two possible floating-point formats.</p> |
申请公布号 |
CA1161563(A) |
申请公布日期 |
1984.01.31 |
申请号 |
CA19810386484 |
申请日期 |
1981.09.23 |
申请人 |
SPERRY CORPORATION |
发明人 |
KREGNESS, GLEN R.;CRISWELL, PETER B. |
分类号 |
G06F7/485;G06F7/00;G06F7/50;G06F7/502;G06F7/508;G06F7/76;G06F9/318;(IPC1-7):G06F7/50 |
主分类号 |
G06F7/485 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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