发明名称 SEMICONDUCTOR MEMORY
摘要 PURPOSE:To attain a data readout speed unchanged from the selection of a normal memory cell even if a spare memory cell is selected, by holding the normal decoder corresponding to a defective memory cell included in the normal memory cell so as not to be established. CONSTITUTION:If the normal memory cell 4 corresponding to the normal decoder 2 has a defective part, a fuse element F1 is blown to disconnect the decoder from a power supply VD to be stopped at all times. A spare decoder 3 is programmed to select a spare memory 5 with the same address data corresponding to the decoder 2. In blowing the fuse element F1, when an address data corresponding to the defective memory cell part is inputted, every gate input of transistors (TRS)21O-21n goes to ''0'', the TRs are cut off, and the node X is increased to ''1''. Further, in impressing a high voltage at the VP and bringing the signal P to a potential of the high power supply VP, TRs 31, 32 turn on, a current flows from the power supply VD via the fuse element F1 and the TRs 31, 32 to blow the F1.
申请公布号 JPS5919298(A) 申请公布日期 1984.01.31
申请号 JP19820127101 申请日期 1982.07.21
申请人 TOKYO SHIBAURA DENKI KK 发明人 IWAHASHI HIROSHI
分类号 G06F12/16;G11C29/00 主分类号 G06F12/16
代理机构 代理人
主权项
地址