| 摘要 |
PURPOSE:To unnecessitate the logical erasure of unused MOS transistor, enable to easily construct a dynamic circuit and a multi-input logical circuit, and thus contrive to improve the integration degree and reduce the design period and the cost by a method wherein a wiring pattern is formed only at necessary one in circuit function of MOS transistors. CONSTITUTION:The device is composed of a pair of P-channel MOS transistor P1 and N-channel MOS transistor N1 wherein gates are connected each other, and the drains and sources of the complementary MOS transistors P1 and N1 are independent without being connected to anyone of others. Since the sources S1 and S2 and the drains D1 and D2 are independent, the number of unused MOS transistors unuseful can be reduced. In case of using only the MOS transistor P1, the MOS transistor N1 becomes an unnecessary unused MOS transistor. However, either one of the source S2 and the drain D1 is in the state of electrical floating, therefore it is not necessary to perform wiring treatment particularly to the transistor N1 even when voltage is impressed. |
