| 摘要 |
PURPOSE:To obtain the same result as combinational logic at a high speed, by fitting freely and easily the combinational logic externally, and supplying a logical input to the combinational logic externally. CONSTITUTION:A register set 5 is stored with external inputs i1-iM. A decoding memory 1 outputs corresponding parts of a decoding pattern to the outputs of the register set 5. A gate memory 3 perform logical arithmetic processing supplied from the memory 1 to the output and a gate selecting memory 7 supplies the kind of arithmetic to the memory 3. A register selecting part 6 specifies respective registers for the transmission of the output from the register set 5, input to the memory 1, output from the memory 3, logical input, and final result. A control part 4 specifies respective memories during operation. A writing part 8 receives external patterns at the memory 1, memory 7, and register selecting part 6 for filling logic in, and they are written. |
