| 摘要 |
PURPOSE:To contrive to make the specific resistance uniform by preventing the evaporation and re-distribution of the impurity doped by high temperature heat treatment by a method wherein the grain diameter of a polycrystalline Si film is increased and thus made uniform, and thereafter the polycrystalline Si film is doped with the impurity. CONSTITUTION:The polycrystalline Si film is grown at a low temperature of approx. 620 deg.C by using pressure reduction CVD method (B1). Next, heat treatment is performed at a high temperature of 1,000 deg.C or more for approx. 30min (B2). Then the ion implantation of phosphorus ion is performed to a gate electrode region, and that of arsenic ion to a load resistance element region (B3). After the ion implantation, annealing for approx. 30min in N2 gas is performed at a high temperature of 900 deg.C (B4). The gate electrode of an MOS transistor and a high resistant load element are formed by photoetching method (B5). The condition of high temperature heat treatment is preferable at a high temperature for a short time. The annealing for 2sec-100sec, for example enables to increase the temperature up to 1,200 deg.C-1,400 deg.C and decrease the re-distribution of impurity in an Si substrate. |
