| 摘要 |
PURPOSE:To increase the response velocity in case the input is inverted for the differential amplifier comprising IGFET, by stopping the operation prior to the input inversion and also charging previously the floating capacity to a high level. CONSTITUTION:FET13 is connected between positive power terminal 1 and 1st output terminal 9, and at the same time FET14 is connected between terminal 1 and 2nd output terminal 10. Then these gates are connected to draw out 1st control terminal 15. Also FET3 is connected between terminals 1 and 9, and 1st input terminal 7 is provided to the gate. At the same time, FET5 is connected between terminals 1 and 10 to provide 2nd input terminal 8. Then FETS4 and 17 are connected between terminal 9 and earth terminal 2, and 2nd control terminal 18 is provided to the gate of EFT17 along with FET6 connected between terminal 10 and FET17. In such constitution of the circuit, the high and low level potential are supplied to terminals 15 and 18 each to stop the function of the amplifier, and floating capacities 11 and 12 are changed to a high level. After this, these levels are inverted to obtain the differential output free from the time delay. |
