Multicomputer system having dual common memories.

摘要

A multicomputer system having dual common memories (1A, 18) in which specified address areas are set within the common memories. The specified address areas are accessible irrespective of whether a CPU (2A, 2B) is in an online mode or a debug mode, while any area other than the specified address areas is accessible only when the function mode of the common memory is in agreement with the access mode of the CPU. In correspondence with each CPU, addresses to be used by the CPU are divided into a plurality of groups of addresses, and the access modes are set for the respective address groups.