| 摘要 |
PURPOSE:To obtain the high integration-degree high-performance MOS dynamic memory, in which a short-channel effect does not affect and effective channel length does not vary and a value in conformity with a design is obtained in the threshold voltage of a switching transistor, by forming the switching transistor through self-alignment. CONSTITUTION:A field oxide film 32 is formed to a P type silicon substrate 31, and a thin thermal oxide film 33 is formed to the surface of the substrate 31. An N<+> type impurity region 34 is formed in a memory cell region, and a first layer polycrystalline silicon film 35 and a first CVD-SiO2 film 36 are deposited on the whole surface in succession. These deposit layers are removed through selective etching, and the N<+> type impurity region 34 exposed from the etching region is removed through etching in the junction depth or more to form groove sections 37, 37. First and second N<+> type impurity regions 38, 38, 39 isolated by the groove sections 37, 37 are formed, second gate oxide films 46, 46 are formed through thermal oxidation treatment, and gate electrodes 47, 47 are formed onto the oxide films 46, 46, thus forming the switching transistor through self-alignment. |
