发明名称 INTEGRATED CIRCUIT
摘要 <p>PURPOSE:To reduce the degradation of characteristics due to the generation of heat of clock-generator itself, and to enlarge a scale of a unit and increase speed of the function without adding other special functions by evenly distributing a buffer section without unevenly distributing generating or forming section of a fundamental clock and a buffer section. CONSTITUTION:The circuit is constituted by a clock signal generating source 1, a clock signal line 2, logic circuit units 3, 4 and buffer circuits 5, 6 arranged to each unit, clock generating source 1 itself has no large drive capability, but is dispersed to the logic circuits 3, 4 using clock signals and has the buffers 5, 6 and drives the buffers, thus dispersing the generation of heat.</p>
申请公布号 JPS5911661(A) 申请公布日期 1984.01.21
申请号 JP19820121589 申请日期 1982.07.13
申请人 NIPPON DENKI KK 发明人 NUKIYAMA TOMOJI
分类号 H01L21/822;G06F1/10;H01L21/8236;H01L27/04;H01L27/08;H01L27/088;H03K19/096 主分类号 H01L21/822
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