发明名称 DEMODULATING CIRCUIT OF DIGITAL SIGNAL
摘要 PURPOSE:To demodulate an input signal into a digital signal representing a binary number with a different level independently of a frequency of a ramp signal, by generating the ramp signal having almost the same period as the digital signal representing a binary number with a duty cycle and comparing a reference level signal generated from the ramp signal with a converted level signal. CONSTITUTION:A signal (a) representing a different duty cycle binary number is applied to an input terminal 1, the ramp signal (voltage) (e) in synchronizing with the digital signal (a) and having almost the same period as it is obtained from a ramp wave generating circuit 4, a peak level EP is applied to potentiometers 16, 17, a signal of reference level is obtained, and on the other hand, the converted level signal (g) in response to the duty cycle of the digital signal (a) is obtained at a sample holding circuit 25. Further a comparison output (h) is outputted by comparing the signals at a level comparator 18, and a digital signal 1 is obtained at a latch circuit 30 via an SW2 at an output terminal 31.
申请公布号 JPS5911514(A) 申请公布日期 1984.01.21
申请号 JP19820120171 申请日期 1982.07.09
申请人 SONY KK 发明人 FUTAGAMI AKIRA
分类号 H03M5/04;G11B20/10;G11C11/407 主分类号 H03M5/04
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