| 摘要 |
PURPOSE:To obtain a digital filter which can execute a double calculation, by reading two data corresponding to the bisymmetrical part of an impulse response out of an RAM when the data written in the RAM is read out, adding these two data by an adder and then multiplying these two data by a coefficient of the impulse response. CONSTITUTION:At a time point when a latch clock (a) is applied to a latch circuit 23, the sum Wn+Wn-7 of data of RAM24 and 25 emerges at the output of an adder 26. A coefficient K1 is multiplied by the output of a multiplier 22, and the data output of the circuit 23 is equal to (Wn+Wn-7)K1 by the clock (a). The same arithmetic operation is applied to latch clocks (b), (c) and (d), and the data of the circuit 23 is shown by the following equation when the clock (d) is applied, that is, Wn-7K1+Wn-6K2+Wn-5K3+Wn-4W4+Wn-3K5+Wn-2K6+ Wn-1K7+WnK8. When the data of Wn+1 is applied, an operation is carried out in the same way as a case where Wn is applied. Then the data emerges at the circuit 23, and the operations of digital filters are successively carried out to perform about a double calculation. |
