| 摘要 |
PURPOSE:To enable to satisfy the prescribed protective withstand voltage even when the titled device is integrated in high density by a method wherein an oppositely conductive buried layer provided on a semiconductor substrate is connected respectively to an input bonding pad and an input gate. CONSTITUTION:The input bonding pad 21 is connected ohmically to the P type buried layer 23 through a P<+> type diffusion layer 26 provided on the layer 23. Moreover a wiring to the input gate is connected ohmically after passing through a resistor 29 formed by the layer 23 and the P<+> type diffusion layers 26. N<+> type diffusion layers 24 are provided respectively on the layer 23 and the N type semiconductor substrate, and are connected ohmically to a VCC electric power source wiring. According to said construction, the even when high voltage noise is applied to the pad 21, because the depth of the layer 23 is made deeper than the depth of the diffusion layer, the conduction due to an alloy spike between the layer 23 and the N type substrate can be prevented from generating. Moreover, by providing the layer 24 on the layer 23 to form a low withstand voltage diode 28, gate protecting function thereof can be ensured. |
