发明名称 |
RANDOM ACCESS MEMORY |
摘要 |
<p>A semiconductor random access memory is provided having a second asynchronous input/output port. Block transfers of data can be effected to and from the memory using the second input/output port. Memory throughput efficiency is improved permitting functions such as display refresh in a mapped memory display to be accomplished through the second input/output port. Memory bus contention on the primary port is also relieved. The main input/output port is thereby free to receive new data for a higher percentage of available transfer time since refresh data is available at the second input/output port.</p> |
申请公布号 |
JPS598193(A) |
申请公布日期 |
1984.01.17 |
申请号 |
JP19830064650 |
申请日期 |
1983.04.14 |
申请人 |
INTERN BUSINESS MACHINES CORP |
发明人 |
FUREDERITSUKU HEIZU DEIRU |
分类号 |
G11C11/41;G09G5/39;G11C7/00;G11C7/10;G11C8/16;G11C11/401;G11C11/406 |
主分类号 |
G11C11/41 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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