HIGH-SELECTIVITY PLASMA-ASSISTED ETCHING OF RESIST- MASKED LAYER

摘要

HIGH-SELECTIVITY PLASMA-ASSISTED ETCHING OF RESIST-MASKED LAYER In a VLSI device fabrication process, erosion of a patterned resist layer during dry etching of an underlying layer can significantly limit the highresolution patterning capabilities of the process. As described herein, a protective polymer layer is formed and maintained only on the resist material while the underlying layer is being etched. High etch selectivities are thereby achieved. As a consequence, very thin resist layers can be utilized in the fabrication process and very-high-resolution patterning for VLSI devices is thereby made feasible.