| 摘要 |
PURPOSE:To ensure an efficient execution of a microprocessor and to reduce power consumption, by performing RAM processing only when the multiplexing is not needed for processing of both interruption and subroutine. CONSTITUTION:The contents of a program counter 31 are written to a stack register 32-1 with the 1st subroutine instruction. The head address of the subroutine to be executed next is written to the counter 31 for execution of processing. If the 2nd subroutine instruction is given during processing of the 1st subroutine processing, the contents of a register 32-2 are written to the region of an RAM 33. Then the contents of the register 32-1 are written to the register 32-2 to execute the subroutine instruction. Then the contents of the counter 31 are written to the register 32-1, and an address which is executed after the subroutine is written to the counter 31. |
