发明名称 STABILIZING CIRCUIT OF DIGITAL SIGNAL VOLTAGE
摘要 PURPOSE:To obtain an output voltage with less deviation and less number of elements, by obtaining plural output signals with respect to plural input signals via each one complementary symmetrical metallic oxide semiconductor integrated circuit supplied with one stabilized electric source. CONSTITUTION:The input side of the complementary symmetrical metallic oxide integrated circuit inverters IC1, IC2...ICn are connected respectively to input terminals I1, I2...In. Further, each power supply terminal is connected to a stabilized power supply circuit 4. The circuit 4 comprises a capacitor C1, a constant voltage diode ZD1 and a resistor R1, and stabilizes a power supply voltage +VDD into a Zener voltage of the constant voltage diode ZD1 and the stabilized voltage is applied to each complementary symmetrical metallic oxide semiconductor integrated circuit. In applying a prescribed digital signal to the terminals I1, I2...In, output signals V1, V2...Vn having a voltage amplitude determined by the inverters IC1, IC2...ICn and stable and less voltage deviation are obtained.
申请公布号 JPS598433(A) 申请公布日期 1984.01.17
申请号 JP19820117341 申请日期 1982.07.06
申请人 NIPPON DENKI KK 发明人 NISHITANI KAZUO;KARA ATSUSHI
分类号 H03K19/0948;H03K19/003 主分类号 H03K19/0948
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