| 摘要 |
PURPOSE:To improve characteristics, quality, and reliability of a transistor, by forming high concentration regions at both ends of a mesa part, especially forming a high concentration N<+> region at a mesa edge part on the side of P type silicon, thereby obtaining electrically inactive property. CONSTITUTION:An electric insulating material is attached and formed by the formation of an N<+> region 11, by the use of CVD, PVD, or other methods. In this case, a base region 3 is not directly exposed at a mesa part 5, even though an insulating film 6 at a mesa edge part becomes thin or does not exist in an extreme case. Therfore, any effect is applied to the base region 3, and the normal transistor performance is provided. Namely, the mesa part 5 is formed between the N<+> region 11, which is formed in the base region 3 and an N type silicon layer 1 in a collector region or N<+> silicon substrate 2. Each end of said mesa part 5 is provided at the N type region, and a P-N junction is offset. |
