发明名称 MEMORY DEVICE
摘要 PURPOSE:To load a base plate to a shelf insensible of capacity of the memory substrate by examining the kind of capacity of each loaded substrate, and setting to address domain alloted to each substrate, and thereby performing address discrimination operation at high speed. CONSTITUTION:In initializing stage, a control circuit 9 reads capacity kind signal (b) of each memory substrate successively at the beginning of operation of the system, and integrates capacity of each substrate, and sets the maximum value of address range alloted to the substrate to a mximum register 2. In executing stage, input address is given and a magnitude comparator 3 in each substrate compares maximum input address value with input address and determines whether the input address is present in its own memory substrate in an AND gate 4. These are performed by each substrate in parallel and only one relevant base plate executes memory access process.
申请公布号 JPS595477(A) 申请公布日期 1984.01.12
申请号 JP19820113479 申请日期 1982.06.30
申请人 FUJITSU KK 发明人 AOKI NORIYUKI;SAKURAGI MASANORI
分类号 G06F12/06;G11C8/00;(IPC1-7):11C8/00 主分类号 G06F12/06
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