发明名称 HYBRID INTEGRATED CIRCUIT
摘要 PURPOSE:To reduce a defective solder bridge, etc. remarkably even when variance is generated in the quantity of solder by forming a bump pattern by adding a solder flowing section consisting of a special fine conductor pattern, into which an excessive solder can flow, and bonding a flip chip onto the pattern. CONSTITUTION:There are the solder flowing sections 8 consisting of fine conductor patterns, which are formed continuously to the bump patterns 9 and into which an excessive solder is flowed, and only bump shapes among the bump patterns 9 are soldered preparatorily, and conductor patterns 2' are exposed as they are in the solder flowing sections 8. Accordingly, when the flip chip 5 is bonded with a substrate 1, force is applied in the direction that crushes solder 6 in bump sections in which the quantity of solder 6 is extremely more than other bump sections, thus pushing the excessive solder away to the solder flowing sections 8. Solder 6 does not move when the quantity of solder 6 of all bumps is balanced.
申请公布号 JPS595639(A) 申请公布日期 1984.01.12
申请号 JP19820115050 申请日期 1982.06.30
申请人 MITSUBISHI DENKI KK 发明人 KATAOKA MASAYUKI
分类号 H05K3/34;H01L21/60;H05K1/11 主分类号 H05K3/34
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