| 摘要 |
PURPOSE:To enable block wiring without enlarging the size of a chip and changing the specification on the design of a wiring system by alternately arranging a plurality of transistors, which are made contain in a semiconductor element group and have approximately the same intervals, at two different levels. CONSTITUTION:The reference transistors are arranged alternately at two different levels in the same direction at the same intervals in a cell. As a fixed wirings to be drawn out as termnals, there are collector wirings C1-C6 drawn out to the upper secions of the transistors in collectors, and there are base wirings B1-B6 drawn out to the lower sections of the transistors in bases. Adjacent emitters are drawn out in one direction of alternately adjacent transistors in emitters, and the fixed wirings E2, E4, E6 of emitters each drawn out to upper levels can be drawn out to upper levels and the fixed wirings E1, E3, E5 of emitters drawn out to lower levels to lower levels. One fixed wirings L1, L2, L3 can be set up vertically in the direction on the side reverse to the direction of draw-out of the emitters of alternately adjacent transistors. |
