发明名称 GAIN CONTROLLER
摘要 PURPOSE:To improve the suppressing ratio of a control signal of a gain control circuit, by providing a bias circuit controlling a DC potential of a video signal with the DC potential of a video signal at the blanking period and an output signal of a comparison circuit detecting the error with a reference potential, for compensating the bias potential error due to the element variance. CONSTITUTION:Differential transistors (TRs) Q15, Q16 are operated only at the blanking period, compare a potential of blanking period of a signal given to a base of the TRQ16 with a bias potential V4 given to the base of the Q15, the error voltage is current-amplified. The result is converted into a voltage at a resistor R16 via a current mirror consisting of a TRQ18, a diode D1, and resistors R14, R15, the peak detection is done at a detecting circuit comprising a TRQ19, a resistor R17 and a capacitor C4 and the result is converted into a DC voltage, the collector current of a TRQ26 is controlled, the DC current component of the collector current of the current mirror Q26 is cancelled so as to form a current flowing to a load resistor R18 only with a signal current component. Thus, the bias voltage of TRs Q9, Q10 is given from a bias power supply V4 via the resistors R18, R19 respectively at all times, and the leakage of the control signal produced with the base potential error is prevented.
申请公布号 JPS594291(A) 申请公布日期 1984.01.11
申请号 JP19820113524 申请日期 1982.06.29
申请人 MATSUSHITA DENKI SANGYO KK 发明人 IDE TATSUKI
分类号 H03G3/10;H03G3/02;H04N5/53;H04N9/68 主分类号 H03G3/10
代理机构 代理人
主权项
地址