发明名称 ERROR PROCESSING SYSTEM OF CHANNEL
摘要 PURPOSE:To permit the use of other IOCs in case of error occurrence and to increase the availability of a system by providing a log analyzing means for analyzing fault information and an address outputting means for a selective resetting execution routine. CONSTITUTION:If an error occurs in a channel CH1 which is in normal data processing and coupled with an IOC2, an error detecting part 3 detects and reports the error occurrence to a log processing part 10 and a log collecting and analyzing part 11 analyzes it to place the CH1 in offline mode by an SVP. Then, the starting address BBB of the selective resetting execution routine is sent out to the CH1 and set in a PS address register 5. Consequently, connected IOCs except the IOC2 are permitted to be used by other channels. When it is judged that recovery from the error is impossible, an SPU causes a machine check interruption to a CPU and then the CH1 resets the IO system.
申请公布号 JPS593607(A) 申请公布日期 1984.01.10
申请号 JP19820113567 申请日期 1982.06.30
申请人 FUJITSU KK 发明人 SHIMIZU SEIICHI;MOURI KOUJI
分类号 G06F11/00;G06F11/07;G06F13/00 主分类号 G06F11/00
代理机构 代理人
主权项
地址