| 摘要 |
PURPOSE:To execute digital servo-control with high accuracy, by executing leading-in operation control of a servo-system and operation cntrol which is in a steady state of the servo-system, as prescribed, respectively. CONSTITUTION:A titled circuit is provided with the first N bit counter 24 for counting the number of clock pulses corresponding to error information from an AND gate 23, and the second N bit counter 25 for counting a 1/M frequency dividing output of the clock pulse. In this state, leading-in operation control of a servo-system is executed by using a counting output by the counter 25 as control data, and in case of a steady state that the servo-system is locked, operation control of the servo-system is executed by control data which synthesizes each counting output by the counters 24, 25. Since the operation control of the servo-system is executed in this way, the servo-system is led in by a wide lock range, and in case of a steady state, it is possible to execute digital servo-control with high accuracy and less quantizing errors. |
