发明名称 BUFFER MEMORY DEVICE
摘要 PURPOSE:To speed up access, by adding all access address to a buffer memory consisting of data parts and tag parts, and continuing accessing at a data part corresponding to a tag part and making the remaining data perform next accessing, when the hit is outputted out of the tag part. CONSTITUTION:An access address A is transferred from a CPU to a register 31 to start access to all storages. Firstly, the reading and comparative matching of tag parts 20-23 and the reading of data parts 10-13 are carried out and when, for example, a tag part 21 generates a hit output, A/B selecting signal changes and an indicating circuit 60 indicates the switching of address selectors; only a selector 54 is left alone in the register 31 and set in an A-address selection state, and other selectors 53, 55, and 56 are all changed over to the sides of a register 32 to access to an address B. Consequently, when the access times of the tag parts to the memory is shorter than that of the data parts, the overall time is shortened nearly to that of the tag parts.
申请公布号 JPS593771(A) 申请公布日期 1984.01.10
申请号 JP19820111890 申请日期 1982.06.29
申请人 FUJITSU KK 发明人 SAKAI TAKASHI
分类号 G06F12/08 主分类号 G06F12/08
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