发明名称 FREQUENCY DIVIDER
摘要 PURPOSE:To eliminate the need for the addition of a counter, even if the frame is long, by opening a gate with a final frequency dividing value, when a desired period is larger than the maximum frequency dividing value, in a frequency divider used for the production of a frame pulse. CONSTITUTION:An operating circuit 26 stores a variable M in its inside and the initial value of the variable M is taken as the final frequency dividing ratio N. The operating circuit 26 references the variable M in synchronizing with the count end pulse outputted from the counter 21, feeds the next calculating value, subtracts the preset value given from the variable M to counters 21-23 so that the period N in total is counted at the counters 21-23. When the variable M is M>2L, the counters 21-23 feed a preset value being the period L, and when M<=2L, the counters 21-23 feed the preset value being the period M. The frequency divider is controlled that the count end pulse of the counters is outputted externally only once per the period N.
申请公布号 JPS592441(A) 申请公布日期 1984.01.09
申请号 JP19820109760 申请日期 1982.06.28
申请人 NIPPON DENKI KK 发明人 HOTSUTA TOSHITSUNE
分类号 H03K23/66 主分类号 H03K23/66
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