发明名称 BUS INTERFACE CIRCUIT OF COMMUNICATION CONTROL DEVICE
摘要 PURPOSE:To reduce the kinds of IC to one kind, by constituting a bus interface circuit by use of the number of blocks for bit-slicing it to the same function unit consiting of a latching circuit, a bus controlling circuit and a selecting circuit. CONSTITUTION:A (write) circuit control part instructs write to a circuit 7 through a control line 8, divides a write address into two and loads it one a common bus. It is latched by a latching circuit and is loaded on an address bus 5. Subsequently, a write data is divided into two, is loaded on a bus 4 and is loaded on a data bus 6 through the latching circuit. A memory write line 12 is selected by a selector, and a main memory is subjected to access. In this way, a bus interface circuit is divided into plural function units having the same circuit configuration, and can be converted to an IC by a function unit, and it can be obtained at a low cost by using plural ICs of only one kind of the bus interface circuit.
申请公布号 JPS592134(A) 申请公布日期 1984.01.07
申请号 JP19820111341 申请日期 1982.06.28
申请人 NIPPON DENSHIN DENWA KOSHA 发明人 TOBE YOSHIHARU;YASHIRO ZENICHI;OOYAMA SHIGERU
分类号 H04L29/10;G06F13/00;G06F13/28;G06F13/42 主分类号 H04L29/10
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