| 摘要 |
PURPOSE:To obtain the structure of an IC whereby the information about the surface potential of an IC pattern and the change thereof with time can be obtained within a short time without damaging the IC by wiring to a cell structure wherein the potential of input-output signals of each logic gate can be easily measured at the wiring part of the IC. CONSTITUTION:Terminals 6 which receive the irradiation of electron beam (EB) are led from the cell part out to the wiring part and thus exposed. Since the terminals 6 are connected to the fine pattern in the cell, the information about the surface potential of the pattern and the change thereof with time can be obtained by measuring the secondary electron signal obtained by irradiating the terminal with the EB. When the IC which receives the irradiation of EB is in the structure of e.g. double layer wiring, a VIA hole 20 is formed after forming an insulation layer 17. Next, an EB probing terminal 21 is formed by being projected above the insulation layer 17 at the time of forming the second layer wiring 19. Since such a terminal 21 is, likewise as the terminal 6, exposed in the wiring region, the damage of the IC at the time of the irradiation on the terminal with EB can be avoided. |
