| 摘要 |
PURPOSE:To detect quickly a failure in a control signal and to prevent the generation of a secondary failure, by discriminating the relation of output/no output among the control signals of accessing to a peripheral device, response from the peripheral device and input/output command to the peripheral device. CONSTITUTION:A readout control signal RCm to a memory, a write control signal WCm, a readout control signal RCi to an input/output interface and a write control signal WCi are inputted to input terminals Ia-Id. Each input terminal of 4-input AND gate 5a provided to a failure detecting circuit 5 is connected respectively to the input terminals Ia-Id, and when any of the control signals RCm, RCi, WCm and WCi is outputted to the memory or the interface, a ''1'' level of gate signal is outputted from the NAND gate 5a. A response signal is inputted to n input terminal Ie and the control signal outputted from a CPU during the peripheral device access period is inputted to an input terminal If. |
