发明名称 ELECTRONIC TIMEPIECE CIRCUIT
摘要 PURPOSE:To prevent an error from occurring when a load with large power consumption is driven without increasing size, by disconnecting a power source and a feeding capacitor in response to a load operation signal and powering on the load with large power consumption through a delay circuit. CONSTITUTION:When the load operation signal is generated by an alarm switch 7 at alarm time, a transistor (TR)16 turns off and a light-load timer circuit body A is powered on by the capacitor 17 disconnected from the power source. At the same time, a gate 9 is opened through the delay circuit B responding to the load operation signal to control a TR10 according to a frequency division output f1; and a speaker 11 with large power consumption is fed from the power source and even when the power voltage drops owing to the large power consumption, the main body A operates normally. Thus, the electronic timepiece circuit which causes no error even when the load with large power consumption is driven is obtained without increasing its size.
申请公布号 JPS59684(A) 申请公布日期 1984.01.05
申请号 JP19820110510 申请日期 1982.06.25
申请人 MATSUSHITA DENKO KK 发明人 GOTOU KAZUHIKO
分类号 G04C10/00;G04C21/02;G04G19/08 主分类号 G04C10/00
代理机构 代理人
主权项
地址