| 摘要 |
PURPOSE:To eliminate a bit error, by selecting one from plural fixed equalizing circuits. CONSTITUTION:Contents of a counter 5 are set to ''0'' in the initial state. In this case, an output of a fixed equalizer 11 is selected by a switch 21. A signal is converted to a digital signal by an A/D converting circuit 3, and thereafter, comparison of a pattern train is executed by a bit error detecting circuit 4. In case when a bit error is detected, the counter 5 is driven by one. As a result, an output of a fixed equalizer 12 is selected by a switch 22. In this way, the counter 5 is driven until the bit error is eliminated. At the point of time when the bit error is eliminated, selection of the equalizing circuit is stopped. |
