发明名称 Data exchange circuit for a magnetic memory apparatus
摘要 A data exchange circuit to change modified frequency modulation (MFM) signals read from a magnetic memory media and converted into data pulse signals to non-return-to-zero signals. The circuit comprises an input flip-flop which receives MFM data pulse signals from a pulse forming circuit. Pre outputs of the input flip-flop is received by a phase locked loop and the other output of the input flip-flop is received by a delay circuit to vary the pulse width of the MFM pulse signal. Instruction signals are provided to the delay circuit to define data reading margins, and to accommodate variations in data widths or data shifts when no particular margin is determined. The phase locked loop synchronizes it's output when the output of the MFM data pulse signal in order to provide clock signals for non-return-to-zero data. The outputs of the phase locked loop and the delay circuit are converted to respective flip-flops in order to generate the non-return-to-zero signals.
申请公布号 US4424536(A) 申请公布日期 1984.01.03
申请号 US19810334362 申请日期 1981.12.24
申请人 TOKYO SHIBAURA DENKI KABUSHIKI KAISHA 发明人 HASHIMOTO, YASUICH;ODA, YASUYUKI
分类号 H03M5/04;G11B20/14;H03M5/12;H03M5/14;H04L7/00;H04L25/49;(IPC1-7):G11B5/09 主分类号 H03M5/04
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