| 摘要 |
<p>PURPOSE:To reduce a timing detection error, by a method wherein the timing detections of a question pulse and a response pulse are performed by the same circuit and the detection in the error width DELTAt of a system delay time being no more than several ten ns is carried by a proportional time prolonging means. CONSTITUTION:A timing detection circuit 24 detects the rising timing of both pulses 101, 102 by passing the output 103 (a synthetic signal of a question signal 101 and a response signal 102) of a synthesizer 25 through a wave detector 26 and a delay comparator 27. The signal 105 subjected to pulse time detection by the delay comparator 27 is separated into a start pulse 108 and a response time pulse 109 by the gate signals 106, 107 from a pulse generator 20 and logical product circuits 28, 29. A proportional time prolonging device 40 calculates an error time DELTAt in a counter 41 using the output 100MHz of a crystal oscillator 36 as a clock signal and said error time (t) is temporarily recorded by a latch circuit 42.</p> |
