发明名称 PROCESS INPUT AND OUTPUT SYSTEM
摘要 PURPOSE:To improve reliability of a process input/output system as a whole and at the same time to improve the economical properties of a device despite a fault of a lower processor, by using an upper processor to back up the lower processor which gives decentralized control to process input and output devices. CONSTITUTION:The input/output control of a process input/output device PIO40 is carried out by a microprocessor MPU20 of a lower processor 22 and via a DMA bus 30, an interface 120, an interface bus 130, a bus switch circuit 140 and a common input/output bus 110. If the MPU20 has a fault under such conditions, a fault detecting circuit 150 informs the fault to a CPU10 of an upper processor 12 as well as to the circuit 140. Then the circuit 140 connects the bus 110 to an input/output bus 100. While, the CPU10 receives the information of the fault and actuates a back-up program of a memory 11. Thus the CPU10 backs up the processor 22 to perform the input/output control of the device PIO40.
申请公布号 JPS58225401(A) 申请公布日期 1983.12.27
申请号 JP19820108811 申请日期 1982.06.24
申请人 TOKYO SHIBAURA DENKI KK 发明人 OOTANI AKIO
分类号 G05B7/02;G06F11/16 主分类号 G05B7/02
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