发明名称 COUNTER
摘要 PURPOSE:To attain measurement with good accuracy even for a short measuring period, by changing the polarity of a clock inputted to a counter depending on the polarity of a reference clock at the start of count. CONSTITUTION:A count starting signal is inputted to a terminal 7 to reset T FFs 14, 15 constituting the counter, and inputted to a T input of a D FF9 to latch the state of a reference clock input terminal 8 in this state. As a result, either of NAND gates 11, 12 is activated. For example, when the state of the terminal 8 is ''H'', the NAND gate 11 is activated. Thus, the reference clock is inverted finally via an inverter 10, the NAND gate 11 and an NAND gate 13 from the input terminal 8 and inputted to the counter. Inversely, when the input terminal 8 is ''L'' at the start of count, the clock is inputted finally to the counter with the original polarity via the NAND gates 12 and 13. Thus, the error of measuring period is suppressed within a half period of the reference clock.
申请公布号 JPS58222621(A) 申请公布日期 1983.12.24
申请号 JP19820105375 申请日期 1982.06.21
申请人 HITACHI SEISAKUSHO KK;HITACHI MAIKURO COMPUTER ENGINEERING KK 发明人 SERA KATSUMI;NISHIJIMA HIDEO
分类号 H03K21/02;H03K21/40;(IPC1-7):03K21/02 主分类号 H03K21/02
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